Study Web

Week 9

Indirect and Indexed Memory Addressing

Indirect and Indexed · Memory Addressing

Indirect and Indexed Memory Addressing

LDR and STR memory addressing

  • We have previously discussed and seen how LDR and STR support indirect addressing
  • allows memory to be addressed via registers holding the address
  • For example:
  • LDR R0,[R1] will load into R0, the contents of the memory address that is currently held in R1.
  • STR R3,[R4] will store the value in R3 to the memory word with address currently held in R4

LDR Indirect example

MOV R1,#0x00040
LDR R0,[R1]

R1

R0
MOV R1,#0x00040
LDR R0,[R1]

R1 0x00040

R0
MOV R1,#0x00040
LDR R0,[R1]

R1 0x00040

R0
MOV R1,#0x00040
LDR R0,[R1]

R1 0x00040

R0 0xffffffff

STR Indirect example

MOV R0, #0xffffffff
MOV R1,#0x00040
STR R0,[R1]

R1

R0
MOV R0, #0xffffffff
MOV R1,#0x00040
STR R0,[R1]

R1

R0 0xffffffff
MOV R0, #0xffffffff
MOV R1,#0x00040
STR R0,[R1]

R1 0x00040

R0 0xffffffff
MOV R0, #0xffffffff
MOV R1,#0x00040
STR R0,[R1]

R1 0x00040

R0 0xffffffff
MOV R0, #0xffffffff
MOV R1,#0x00040
STR R0,[R1]

R1 0x00040

R0 0xffffffff

Indexed Memory Addressing

  • It is often desirable to address specific words/bytes of memory as an offset from some base address.
  • For example:
  • Accessing dedicated memory locations that control/interact with external hardware/systems
  • Pixel display
  • Arrays (blocks of memory used to collect values of the same type)
  • Structs (blocks of memory used to collect values of different types)
  • In such examples, there is typically a base address indicating the start of addresses dedicated to the specific use-case.
  • We can therefore index specific memory locations within as an offset from this base address

Indexed Addressing Syntax

  • In ARM assembly:
  • LDR R0, [R1 + #4]
  • STR R2, [R1 + #16]
  • LDR R0, [R1 + R3]
  • STR R2, [R1 + R4]
  • In ARM assembly:
  • LDR R0, [R1 + #4] Load the value at memory address [R1] + 4 bytes into R0
  • STR R2, [R1 + #16]
  • LDR R0, [R1 + R3]
  • STR R2, [R1 + R4]
  • In ARM assembly:
  • LDR R0, [R1 + #4]
  • STR R2, [R1 + #16] Store the value in R2 in memory at address [R1] + 16 bytes
  • LDR R0, [R1 + R3]
  • STR R2, [R1 + R4]
  • In ARM assembly:
  • LDR R0, [R1 + #4]
  • STR R2, [R1 + #16]
  • LDR R0, [R1 + R3] Load the value at memory address [R1] + R3 (no. of bytes) into R0
  • STR R2, [R1 + R4]
  • In ARM assembly:
  • LDR R0, [R1 + #4]
  • STR R2, [R1 + #16]
  • LDR R0, [R1 + R3]
  • STR R2, [R1 + R4] Store the value in R2 in memory at address [R1] + R4 (no. of bytes)

Indexed Addressing LDR Example

MOV R1, #0x00040
LDR R0, [R1 + #4]

R1

R0
MOV R1, #0x00040
LDR R0, [R1 + #4]

R1 0x00040

R0
MOV R1, #0x00040
LDR R0, [R1 + #4]

R1 0x00040

R0
MOV R1, #0x00040
LDR R0, [R1 + #4]

0x00040 + 4 = 0x00044
R1 0x00040

R0
MOV R1, #0x00040
LDR R0, [R1 + #4]

R1 0x00040

R0 0xffffffff

Indexed Addressing STR Example

MOV R0, #0xffffffff
MOV R1, #0x00040
MOV R2, #16
STR R0, [R1 + R2]

R2

R1

R0
MOV R0, #0xffffffff
MOV R1, #0x00040
MOV R2, #16
STR R0, [R1 + R2]

R2

R1

R0 0xffffffff
MOV R0, #0xffffffff
MOV R1, #0x00040
MOV R2, #16
STR R0, [R1 + R2]

R2

R1 0x00040

R0 0xffffffff
MOV R0, #0xffffffff
MOV R1, #0x00040
MOV R2, #16
STR R0, [R1 + R2]

R1 0x00040

R0 0xffffffff
MOV R0, #0xffffffff
MOV R1, #0x00040
MOV R2, #16
STR R0, [R1 + R2]

R1 0x00040

R0 0xffffffff
MOV R0, #0xffffffff
MOV R1, #0x00040
MOV R2, #16
STR R0, [R1 + R2]

R1 0x00040 0x00040 + 16 (0xF) = 0x00050

R0 0xffffffff
MOV R0, #0xffffffff
MOV R1, #0x00040
MOV R2, #16
STR R0, [R1 + R2]

R1 0x00040 0x00040 + 16 (0xF) = 0x00050

R0 0xffffffff
MOV R0, #0xffffffff
MOV R1, #0x00040
MOV R2, #16
STR R0, [R1 + R2]

R1 0x00040 0x00040 + 16 (0xF) = 0x00050

R0 0xffffffff
MOV R0, #0xffffffff
MOV R1, #0x00040
MOV R2, #16
STR R0, [R1 + R2]

R1 0x00040

R0 0xffffffff

Indexed Addressing LDRB Example

MOV R1, #0x00040
LDRB R0, [R1 + #2]

R1

R0
MOV R1, #0x00040
LDRB R0, [R1 + #2]

R1 0x00040

R0
MOV R1, #0x00040
LDRB R0, [R1 + #2]

R1 0x00040

R0
MOV R1, #0x00040
LDRB R0, [R1 + #2]

R1 0x00040

R0
MOV R1, #0x00040
LDRB R0, [R1 + #2]

R1 0x00040

R0 0x000000bb

Indexed Addressing STRB Example

MOV R0, #0x000000ff
MOV R1, #0x00040
MOV R2, #3
STRB R0, [R1 + R2]

R2

R1

R0
MOV R0, #0x000000ff
MOV R1, #0x00040
MOV R2, #3
STRB R0, [R1 + R2]

R1 0x00040

R0 0x000000ff
MOV R0, #0x000000ff
MOV R1, #0x00040
MOV R2, #3
STRB R0, [R1 + R2]

R1 0x00040

R0 0x000000ff
MOV R0, #0x000000ff
MOV R1, #0x00040
MOV R2, #3
STRB R0, [R1 + R2]

R1 0x00040

R0 0x000000ff
MOV R0, #0x000000ff
MOV R1, #0x00040
MOV R2, #3
STRB R0, [R1 + R2]

R1 0x00040

R0 0x000000ff

Some Observations and Notes

  • For word index addressing (ie STR, LDR):
  • the offset number of bytes must be a multiple of 4 (ie., 4 bytes per word)
  • For byte index addressing (ie STRB and LDRB):
  • Remember ARMlite uses little endian byte addressing
  • If a byte offset is larger than 4 then it will be addressing bytes in adjacent words