Digital Logic Foundations
Half and Full Adders
Adder circuits are the foundation of arithmetic in digital computers. The half adder adds two bits; the full adder extends this with a carry-in, enabling multi-bit addition.
Why Adders?
Consider adding two 7-bit binary numbers:
+ 0 0 1 1 1 0 0
─────────────────
c 0 1 1 1 1 0 0 (carry row)
= 1 0 0 1 0 1 0
To perform this addition digitally, we need 1-bit adder building blocks — starting with the half adder.
Half Adder
A half adder adds two single bits (X and Y) and produces two outputs: Sum (S) and Carry-out (Co).
The XOR gate calculates the sum. The AND gate calculates the carry.
| X | Y | Sum S | Carry Co |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
Full Adder
A full adder adds three bits: two data inputs (X, Y) plus a Carry-in (Ci) from the previous stage. It produces Sum (S) and Carry-out (Co).
| Ci | X | Y | Sum S | Carry Co |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
A full adder can be built from two half adders plus an OR gate:
- First half adder: adds X and Y → partial Sum₁ and Carry₁
- Second half adder: adds Sum₁ and Ci → final Sum S and Carry₂
- OR gate: Co = Carry₁ OR Carry₂
Chaining Full Adders — Multi-bit Addition
To add two n-bit numbers, chain n full adders (or n-1 full adders + 1 half adder for the LSB):
Each full adder's Co feeds into the next adder's Ci. An 8-bit adder uses 7 full adders + 1 half adder.
Counting Analogy
A full adder essentially counts how many of its three input bits are high:
- 0 or 1 inputs high → Sum=0 or 1, Carry=0
- 2 inputs high → binary 10 → Sum=0, Carry=1
- 3 inputs high → binary 11 → Sum=1, Carry=1