More ripple counters

RIPPLE COUNTER

• Ripple counters utilise the toggle setting of J-K Flip Flops:

One’s

Two’s Four’s Eight’s

MORE COUNTERS

• Suppose we want to count up to a power of two? For
• Why 6 you ask?

• Suppose we want to count in a modulo that is not a neat
• Why 6 you ask?

MOD 6 COUNTER

• What do we need to do?
• An incrementing counter
• A forced reset of all Flip Flops to zero when the

MODULO 6 COUNTER

• What do we need to do?
• An incrementing counter: falling edge trigger – easy!
• A forced reset of all Flip Flops to zero when the counter reaches 6: some extra logic gates to monitor things, and trigger a FF reset – not too tricky

• Have a go!
• Detect the illegal state (6)
• Reset the FFs to wrap around to zero

MODULO 6 COUNTER WITH A MOMENTARY ILLEGAL STATE

• Detecting the first illegal state (6 in this case) and immediately resetting to 0 (don’t wait for the clock) by using the asynchronous master reset (MR) or CLR‘
• This circuit uses a cascading clock J K C1 Q1 K C2 Q2 J K C3 Q3 J 1 1 1 C

MR MR MR or 7 forcing the master resets to clear each F/

F to zero

SUMMARY

• detect “illegal state”

• Slight problem though:
• Master reset is asynchronous
• The illegal state momentarily still happens!
• We can do better! ….in fact.. We NEED to do better ….next lecture